Apple
CPU Power Management Architecture Lead
San Francisco Bay Area, US - Consumer Electronics
Apple’s Silicon Engineering Group (SEG) designs high-performance, low power microprocessors that power iPhone and iPad. We are looking for an experienced technical leader to guide and direct world-class CPU power management solutions.
Key Qualifications
- The ideal candidate should possess 10 years of CPU RTL and architecture experience.
- Knowledge of Verilog and/or VHDL. Experience with simulators and waveform debugging tools.
- Knowledge of logic design principles along with timing and power implications.
- Understanding of low power microarchitecture techniques.
- Understanding of high performance techniques and trade-offs in a CPU microarchitecture.
- Experience in C or C programming and interpretive languages such as Perl or Python.
Description
Lead an RTL and architecture team in the refinement of advanced solutions in the following areas:
Dynamic voltage and frequency scaling (DVFS/DVFM)
Advanced thermal and energy management
Power state definition and management
Dynamic clocking solutions
Di/dt mitigation strategies
Micro-architecture strategies for improved power integrity
Debug solutions
Error handling
Reset enter/exit
Clock generation and asynchronous clock crossing strategies
Microarchitecture development and specification. From early high-level architectural exploration, through microarchitectural research and arriving at a detailed specification.
RTL ownership. Development, assessment and refinement of RTL design to target power, performance, area and timing goals.
Design delivery. Work with cross-functional engineering team to implement and validate physical design on the aspects of timing, area, reliability, testability and power.
Education
Required: Bachelor’s, Electrical or Computer Engineering
Preferred: Master’s or PhD, Electrical or Computer Engineering
No salary provided
Posted March 26, 2015 at 07:52AM from LinkedIn http://ift.tt/1yaNmNB
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